As semiconductor devices continue to decrease in size, the size of trenches and vias continue to decrease. With smaller trenches and vias the semiconductor devices may experience via bowing and time dependent dielectric breakdown resulting in, for example, via to metal shorts and lower resolution and uniformity. The shorts and dielectric breakdown may decrease the device yield and reliability and also increase defectivity. Thus, new devices and methods for shrinking the critical dimension of back end of line via formation is needed.